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HIGHLY ACCELERATED STRESS TESTING FOR ELECTRONIC COMPONENTS (HAST)

The most common types of reliability tests for semiconductors are:burnin, power temp cycle (PTC), and HAST.

HAST TEST

HAST stands for Highly Accelerated Temperature / Humidity Stress Test and is abbreviated as Highly Accelerated Stress Testing. HAST uses accelerated temperature and humidity conditions to precipitate failures that could be caused by long-term exposure to humid environments.

HAST was developed to replace the Temperature Humidity Bias (THB) test. THB has typical conditions of 85 C and 85% relative humidity with a bias voltage applied to the sample. A typical THB test time would be 1000 hours. HAST uses increased test temperatures of 110 to 130 C, which typically shortens the test time to 96 hours. Therefore, by choosing HAST over THB for an accelerated reliability test, the test can be completed in days, not weeks. HAST uses positive pressure in the test chamber (typically 2-3 atmospheres) as well as temperatures above 100 C and controlled humidity. This requires the chamber to be hermetically sealed to prevent leakage. The test is performed with or without voltage bias on the samples. For a polarized test, a DC voltage is applied to the samples. For semiconductors, samples are placed in sockets located inside the test chamber.The wires inside the chamber pass through a sealed loop where they are connected to the power supplies located outside the chamber. The polarization can be a direct or cyclic voltage.


BURNIN TEST

Burnin tests verify the reliability of the semiconductor device and are typically performed at 125 ° C or 150 ° C, while the electrical signals and power are applied to the ASICs. Burnin panels are inserted into the burnin system which provides the necessary power and stimulus to the samples while maintaining the oven temperature at the required temperature. After the stress test, the samples should be tested on ATE to ensure that they have passed the oven test. PTC Power Cycle and Temperature (PTC) testing is performed to determine a device's ability to withstand alternating exposures to extremely high and low temperatures with operational biases periodically applied and removed.




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